Description:

Responsibilities

  • Contribute to the development of efficient ASIC SoC Architecture through analog/digital design, design verification, physical design, test, methodology, compute infrastructure, or tooling

  • Work on our in-house IPs needed and how they need to be integrated, connected and verified

  • Learning and understanding of chip-level integration, verification plan development and verification

  • Learning and understanding and develop physical design implementation

  • Supporting the test program development, chip validation and chip life until production maturity

  • Work with emulation engineers to perform early prototyping

  • Assist with algorithm analysis, algorithm verification and improvement

Minimum Qualifications

  • Either BS Electrical Engineering/Computer Science or equivalent experience in a technical role in the military

  • Basic Coding and/or Scripting experience (Verilog, Python, C/C++, or similar)

  • Experience articulating complex engineering solutions to both technical and nontechnical cross-functional partners

  • Military Veteran

Preferred Qualifications

  • Experience working in at least one of: Verilog/SystemVerilog, Python, C/C++ or similar

  • Understanding of digital ASICs design flows

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